The present invention relates to a design method for logic circuit, a design support system for a logic circuit and a readable media and particularly to a technique which can be adapted effectively for optimization of a logical composition based on a logic circuit description utilizing a hardware description language.
In a logical design of semiconductor integrated circuits, the hardware description language such as VHDL (Verilog Hardware Description Language) similar to the programming language such as a C-language is used with improvement in a logical scale and an integration density. A logic circuit, for example, in the gate level can be obtained by conducting a logical composition process for the logic circuit description described with the hardware description language. In this case, since it is impossible, from the viewpoint of the scale or computer capability, to simultaneously realize logical composition of the chip as a whole of semiconductor integrated circuit, it is essential to divide the logical composition process in the unit as small as possible within the range of the overhead for the division as narrow as possible. It is enough that this division is made in the range assuring higher independence of logic to provide the scale to realize logical composition but smaller division is further required in actual because the logical scale must be lowered to optimize the logical composition. Moreover, on the occasion of logically composing the units of division, it is required to select and adapt the optimum algorithm from several algorithm candidates. In the actual logical composition, logical division and selection of the optimum algorithm are entangled to increase difficulty for solution and trial and error have been manually repeated to solve such problems.
The technique for introducing the determination process which is an experimental performance of the people into the process control or the like is described in the Official Gazette, Japanese Laid-Open Patent Applications No. HEI 3(1991)-265974 for employment of the fuzzy reasoning into the system design support and No. HEI 4(1992)-70906 for employment of the fuzzy reasoning into the determination of optimization of the control system.
However, the inventors of the present invention have found there rises a problem that fluctuation in the composition result becomes large in addition to increase in the man-hours and period for manufacture, if manual trial and error process occupies the greater part for solution of the complicated phenomenon such as logical division and selection of algorithm candidates at the time of logical composition.
The inventors of the present invention have discussed adaptation, into the logical composition, of automatic means which is similar to optimization based on the discovery which is experimental event of people but the related art using the fuzzy reasoning does not give any hint thereto.
It is therefore an object of the present invention to provide a design method for logic circuit, a design support system for the logic circuit and a readable medium having recorded the design support program for the logic circuit which can reduce the period required for logical composition for the logic circuit description based on the hardware description language.
It is another object of the present invention to provide a design method for the logic circuit, a design support system for the logic circuit and a readable medium having recorded the design support program for the logic circuit which can reduce usual fluctuation of the logical composition result for the logic circuit description based on the hardware description language.
It is further object of the present invention to provide a design method for logic circuit, a design support system for the logic circuit and a readable medium having recorded the design support program for the logic circuit which can make contribution to improvement of performance of the semiconductor integrated circuit designed via the logical composition for the logic circuit description based on the hardware description language.
The aforementioned and the other objects and other features of the present invention will becomes more apparent from the description of the present specification and the accompanying drawings.
The typical invention among those disclosed in the present application will be summarized briefly in the following explanation.
[1] In the present invention, the automatic method similar to the optimization based on the discovery which is an experimental phenomenon of people is adapted to the logical composition for the logic circuit description based on the hardware description language. Namely, the optimization algorithm candidates of a plurality of circuit blocks which are given with the logic circuit description based on the hardware description language are determined (first process) using the fuzzy reasoning in which the Hamming distance of circuit block is taken into consideration. The common circuit block of the optimization algorithm candidates determined in the first process is grouped using the fuzzy reasoning in which a coupling degree among circuit blocks are taken into consideration (second process). Result of grouping based on the fuzzy reasoning is also a result for the circuit block obviously characterized in the algorithm candidates and coupling degree and the circuit block having a rather uncertain characteristics are not grouped or tentatively grouped with the other method. In order to promote optimization of grouping for the circuit block having rather uncertain characteristic, the third process is executed to optimize the grouping of a plurality of circuit blocks based on the hereditary algorithm by reflecting the result of grouping with the second process on the initial condition.
The present invention will be explained in detail by referring to the other profile of the invention. The initial values to be integrated based on the fuzzy reasoning are determined for a plurality of circuit blocks (for example, circuit block specified with the always block or function block or the like) given with the logic circuit description based on the hardware description language. The membership function used for fuzzy reasoning is first a function to specify the correlation between the index considering the Hamming distance obtained from the truth value table of each circuit block and the optimization algorithm candidates. For example, the logic in which the Hamming distance is matched with the number of signals of circuit block is the function of inverter, while the logic in which the Hamming distance is similar to a half (xc2xd) of the number of signals is similar to the function of EOR (exclusive logical sum) and other logics are characterized similar to the function of AND-OR. As the index explained above, it is possible to employ the average Hamming distance index which is given as xcexa3|Hijxe2x88x92S/2|/(N*M*S/2) wherein number of conditions of circuit block is S, number of input signals of circuit block is N, number of output signals of circuit block is M and the Hamming distance between the i-th input signal and j-th output signal is Hij. The membership function is secondly a function to specify the correlation between a coupling degree obtained from matching ability of the input/output signals among mutual circuit blocks and permission/no-permission of integration for the circuit block. Depending on such membership function, the optimization algorithm candidates are assigned to the circuit blocks and the circuit blocks having higher coupling degrees among those having the same algorithm as the candidate is grouped as the circuit blocks to be integrated with the logical composition.
A result of grouping for the circuit blocks to be integrated is reflected on the initial condition of the individuals to optimize the grouping of a plurality of circuit blocks with the hereditary algorithm. Each individual uses a pair, for example, of integrated circuit block and algorithm candidate as the data and V*S*L as the evaluation function (the symbol * means multiplication) when the number of variables of logical equation expressed with the integrated circuit block is defined as V, number of stages of logic as S and a combined load which increases depending on the scale of logic as L. A plurality of individuals which are well evaluated based on the evaluation function are selected, generation is stacked to set up the heredity to the common part of genes of a plurality of selected individuals and thereby the individual of which evaluation has reached the specified value can be obtained as the optimized solution.
The result derived through the optimization process with the hereditary algorithm suggests the division within the scale of logics to be combined to result in the overhead as small as possible and the optimization algorithm for such block is simultaneously determined. Therefore, the logical composition result can be obtained immediately by following such result. Moreover, it is also possible to reduce the period required for logical composition for logic circuit description based on the hardware description language and to reduce usual fluctuation of the logical composition result for the logic circuit description based on the hardware description language. Therefore, much contribution can be made for improvement of performance of the semiconductor integrated circuit which is designed via the logical composition for the logic circuit description based on the hardware description language.
[2] A design method for logic circuit can be realized with a design support system for logic circuit comprising an input means, a memory means and a data processing means for executing the arithmetic processes utilizing an input information from the input means and also using the memory means. In the design support system for logic circuit, the input means is capable of inputting the logic circuit description data based on the hardware description language. The data processing means can execute the first to third processes explained above.
[3] The program to control a computer to execute the design method for logic circuit may be provided from a readable medium. Namely, the medium records the design support program for logic circuit to execute the first to third processes. Therefore, the design method for logic circuit can be realized easily with an engineering work station and a personal computer.